Based on observation of exponential growth of number of transistors on an integrated circuit chip, Moore's Law predicted in 1965 that transistors will halve in size every 18 months. Although this phenomenon has proven correct for half a century and transistors continue to grow exponentially smaller, due to constraints in the buildup of heat that occurs when powering many densely packed transistors, new frontiers of electrical engineering must be explored to allow for Moore's Law to continue into the future.
Current research efforts in nanophotonics, such as the Photonically Optimized Embedded Microprocessors (POEM) program, propose using light, instead of electrical wires, in microprocessors to communicate with transistors, which could lead to extremely energy efficient computing for use in everyday electronics such as laptops and smartphones, supercomputing applications where high computing speed is desired, and military platforms such as unmanned aerial vehicles and satellites where low power is a necessity. Specifically, these efforts focus on addressing electrical communication link limitations by developing integrated photonic technology to enable seamless intra-chip and off-chip photonic communications that provide high bandwidth and low energy per bit transmission. To allow for the use of current fabrication facilities and decrease overhead cost of implementation, this technology is designed for fabrication in both the silicon on insulator (SOI) and bulk complementary metal oxide semiconductor (CMOS) processes, the current prevalent microelectronics fabrication methods, which will allow for complete integration with all aspects of current microcontroller design.
In order to achieve this high bandwidth, low energy communication, nanophotonic devices, the building blocks of this proposed communication link, must be designed efficiently using electromagnetic numerical solvers. One of these main nanophotonic devices, and the product of this focused aspect of the larger POEM project, is the grating coupler which radiates light from an on-chip waveguide into an out-of-plane optical fiber. Previous research efforts have enabled the design of grating couplers that are highly inefficient and cause significant power loss compromising the effectiveness of the entire communication link system. This project focuses on solving the problem of grating coupler inefficiency and results in the design and manufacturing of an ultra-efficient grating coupler in both the SOI and bulk CMOS processes. These results of this project will dramatically contribute to the energy efficiency of future photonic communication links.